This course aims to provide an understanding of basic VLSI layout and circuit design principles. In particular, to look at how CAD tools are utilized in designing digital integrated circuits. For more details see the course syllabus. In addition to the syllabus, a course overview is provided for part III students making Options Choices.

Lecture Notes for 2025-2026:

• Introduction - ...unedited

1. SystemVerilog Hardware Description Language - ...unedited
2. State Machine Design using SystemVerilog - ...unedited
3. Gate Matrix Design - ...unedited
4. Bitslice Design
5. Pad Ring and Floor Planning

• General- Report Writing Guidelines
• Interpretation of feedback - Equivalent marks for letter grades

Assignments for 2025-2026:

• Mini Design Exercise 1 : Gate Design
  • Sweeping parameter values in HSpice
  • Electronic Handin Deadline 16:00 Wednesday 22^nd October

• Mini Design Exercise 2 : SystemVerilog Design -- Not yet published

• Design Exercise 3 : Cell Library Design -- Not yet published

• Design Exercise 4 : System Design -- Not yet published

Laboratory Course:

This course is supported by the CAD Tools and Techniques laboratory course. The course makes use of required CAD and other software

Associated Lecture Course:

This course is closely associated with the Integrated Circuit Design course which is either taken prior to or concurrently with this course.