Project overview
Until recently low power, fault tolerance and testing techniques for electronic systems have been developed mostly independently, driven by the different requirements of various market segments. The continuing demand for portable devices, however, is creating a very competitive market where low power and high reliability are the two main factors driving products success. The incompatibilities between the existing techniques for low power, fault tolerance and test are making the development of such products an expensive process. This project addresses this issue by investigating and developing fault tolerance and testing techniques that are compatible with low power, thus enabling cost-effective design and manufacturing of low power electronic systems with improved reliability. For this research we will exploit expertise on low power design using dynamic-voltage scaling, fault tolerance improvement using hardware-redundancy and customized design-for-test solutions available at Southampton University. Extensive computer simulations as well as an industrial case study involving practical experiments will be used to validate the developed techniques. The work will be carried out in close collaboration with ARM (Cambridge), and the universities of Bristol and Iowa.
Staff
Lead researchers
Other researchers
Research outputs
Ashish Darbari, Bashir M Al Hashimi, David Flynn & John Biggs,
2009
Type: conference
Syed Saqib Khursheed, Bashir Al-Hashimi, Sudhakar M. Reddy & Peter Harrod,
2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(3), 406-416
Type: article
Saqib Khursheed, Urban Ingelsson, Paul Rosinger, Bashir Al-Hashimi & Peter Harrod,
2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(6), 1117-1127
Type: article
Ashish Darbari, Bashir Al-Hashimi, Peter Harrod & Daryl Bradley,
2008
Type: conference