Research project

Resilient and Testble Energy-Efficient Digital Hardware

Lead researchers:

Professor Sir Bashir Al-Hashimi
Research funder:

EPSRC
Status:

Not active

Staff

Lead researchers

Professor Sir Bashir Al-Hashimi CBE, FREng, FIEEE, FIET, FBCS

Research interests

Energy-efficient mobile computing systems
Low-power test and test-data compression of digital integrated circuits and energy-harvesting computing
Wearable and Autonomous Computing for Future Smart Cities

Connect with Bashir

Email: bmah@ecs.soton.ac.uk

Research outputs

DFT architecture with power-distribution-network consideration for delay-based power gating test

Vasileios Tenentes, Saqib Khursheed, Daniele Rossi, Sheng Yang & Bashir M. Al-Hashimi, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1-12

DOI: 10.1109/TCAD.2015.2446939

Type: article

Sequence-aware watermark design for soft IP embedded processors

Jedrzej Kufel, Peter R. Wilson, Stephen Hill & Bashir M. Al-Hashimi, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1-14

DOI: 10.1109/TVLSI.2015.2399457

Type: article

High quality testing of grid style power gating

Vasileios Tenentes, Syed Saqib Khursheed, Bashir M. Al-Hashimi, Shida Zhong & Sheng Yang, 2014

DOI: 10.1109/ATS.2014.37

Type: conference

Improved state integrity of flip-flops for voltage scaled retention under PVT variation

Sheng Yang, Saqib Khursheed, Bashir M. Al-Hashimi, David Flynn & Geoff V. Merrett, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers, 60(11), 1-9

DOI: 10.1109/TCSI.2013.2252640

Type: article