About the project
Electroencephalography (EEG)-based brain–computer interfaces are held back less by the sensors than by the computing behind them. Decoding still happens on a laptop or in the cloud, which caps how small, how portable and how responsive a system can be. Moving that computation onto the head requires an accuracy, latency and power budget that conventional processors do not meet at once. This project designs a processor for scalp EEG by adapting and extending the neuromorphic AI architecture for implantable neural processing previously developed by our group.
The project begins with a novel encoding scheme that converts continuous EEG signals into sparse events while preserving the phase, amplitude, and spectral information needed for decoding, unlike existing vision-inspired encodings, which typically discard these features. On that foundation, it develops and quantises event-driven decoder architectures for standard EEG paradigms such as motor imagery, evoked/steady-state responses and mental-state classification, benchmarked against deep-learning baselines.
To address EEG's poor cross-session and cross-subject generalization, the architecture incorporates lightweight on-chip learning that recalibrates on-device without full retraining, and is co-designed with the analogue front end to degrade gracefully under real-world noise (muscle activity, eye movement, motion, mains interference).
The work then moves towards silicon through Register-Transfer Level (RTL) design, Field-Programmable Gate Array (FPGA) prototyping, and joint characterisation of accuracy, latency, and power consumption, with tape-out if feasible, culminating in validation on live human EEG in a fully on-device closed-loop task.
Research Foundations:
- Noninvasive decoding of typed sentences from human brain activity
- Decoding speech perception from non-invasive brain recordings
Expected Deliverables:
- a novel event-encoding scheme for oscillatory biosignals, compatible with different EEG-based BCI applications
- benchmarked spiking decoder architectures for standard EEG paradigms.
- a processor architecture, RTL implementation and FPGA prototype; a fabricated device if the project supports it
- a real-time, on-device EEG decoding demonstration on human participants
The School of Electronics and Computer Science is committed to promoting equality, diversity inclusivity as demonstrated by our Athena SWAN award. We welcome all applicants regardless of their gender, ethnicity, disability, sexual orientation or age, and will give full consideration to applicants seeking flexible working patterns and those who have taken a career break. The University has a generous maternity policy, onsite childcare facilities, and offers a range of benefits to help ensure employees’ well-being and work-life balance. The University of Southampton is committed to sustainability and has been awarded the Platinum EcoAward.
