ELEC3219 Advanced Computer Architecture
Module Overview
This module covers the development of modern computer architectures for servers, workstations, hand-held devices, signal processing and embedded systems from the introduction of the four-stage RISC pipeline to the present day.
Aims and Objectives
Module Aims
This module gives a broad introduction into the study of computer architecture as it applies to current electronic and computer systems. We will look at the history of specialist architectures and draw lessons for the present from the successes and failures of the past. We will investigate simulation techniques of use in developing and analysing modern architectures.
Learning Outcomes
Knowledge and Understanding
Having successfully completed this module, you will be able to demonstrate knowledge and understanding of:
- The evolution of modern computer architectures
- The design decisions taken in modern architectures
Subject Specific Intellectual and Research Skills
Having successfully completed this module you will be able to:
- Evaluate the likely performance of a proposed computer architecture
- Outline the design of a computer system to meet a performance requirement
Transferable and Generic Skills
Having successfully completed this module you will be able to:
- Use graduate-level literature to expand your understanding of future architectures
Subject Specific Practical Skills
Having successfully completed this module you will be able to:
- Evaluate by simulation the performance of key architectural features
Syllabus
- Evolution of hardware capabilities: density, speed, power, communications - Virtual memory, virtualised processors - The programming interface: instruction sets and memory models, compiler support - Memory Hierarchies: cache architectures - Branch prediction - Cache coherence - Instruction parallelism: pipeline optimisations, superscalar and out-of-order execution - Data parallelism: dataflow, vector, SIMD - Thread parallelism: hyper-threading, latency hiding, multi-core - GPUs and other accelerators, Intel Phi - Special-purpose processors: DSPs - System on-chip - Architecture performance simulation
Learning and Teaching
| Type | Hours |
|---|---|
| Revision | 10 |
| Wider reading or practice | 43 |
| Completion of assessment task | 19 |
| Demonstration | 6 |
| Tutorial | 6 |
| Lecture | 36 |
| Preparation for scheduled sessions | 18 |
| Follow-up work | 18 |
| Total study time | 156 |
Resources & Reading list
Jim Jeffers, Intel Xeon Phi (2013). Coprocessor High Performance Programming.
John L Hennessy and David A Patterson (2011). Computer Architecture: A Quantitative Approach.
John L Hennessy and David A Patterson (2013). Computer Organization and Design: The Hardware/Software Interface.
Assessment
Summative
| Method | Percentage contribution |
|---|---|
| Architecture simulation | 15% |
| Architecture simulation | 35% |
| Examination (2 hours) | 50% |
Referral
| Method | Percentage contribution |
|---|---|
| Examination | 100% |
Repeat Information
Repeat type: Internal & External
Linked modules
Pre-requisites: (ELEC1201 AND ELEC1202) OR (COMP1202 and COMP1203)