Module overview
Linked modules
This is the design exercise support module for EEE programme at UoSM.
Aims and Objectives
Learning Outcomes
Subject Specific Practical Skills
Having successfully completed this module you will be able to:
- Design testbenches to verify electronic design.
- Build and debug a digital circuit.
- Design, write and debug Object-Oriented programs
- Use simple numerical programs to solve physical problems
Transferable and Generic Skills
Having successfully completed this module you will be able to:
- Demonstrate working knowledge of state-of-the-art commercial software tools for digital system design.
- Address novel design challenges by choosing appropriate analysis and design methods.
- Model software systems before implementation.
- Select an appropriate numerical approach for different simple mathematical problems.
Subject Specific Intellectual and Research Skills
Having successfully completed this module you will be able to:
- Effectively integrate reusable Object-Oriented libraries.
- Describe state machines of moderate complexity in SystemVerilog, simulate and synthesise into hardware.
- Develop CPLD and FPGA implementations of combinational and sequential digital systems.
- Analyse, enhance and debug existing Object-Oriented programs.
Knowledge and Understanding
Having successfully completed this module, you will be able to demonstrate knowledge and understanding of:
- Sequential digital system design for implementation in CPLDs and FPGAs.
- Power conversion and regulation techniques
- The principles and application of Design for Test
- The principles of Object-Oriented programming, including the concepts of inheritance, abstraction and polymorphism.
Syllabus
Learning and Teaching
Teaching and learning methods
Type | Hours |
---|---|
Specialist Laboratory | 24 |
Preparation for scheduled sessions | 12 |
Wider reading or practice | 32 |
Completion of assessment task | 32 |
Lecture | 24 |
Follow-up work | 12 |
Tutorial | 12 |
Total study time | 148 |
Resources & Reading list
General Resources
Online documents. Lecture notes and details of assignments and assessment schemes will be provided online.
Software requirements. Quartus, Modelsim
Laboratory space and equipment required. Programming and digital system facilities
Textbooks
Walter Savitch (2012). Absolute C++. Pearson.
Mark Zwolinski (2004). Digital System Design with VHDL. Pearson Prentice Hall.
Stanley Lippman, Josée Lajoie, Barbara Moo (2012). C++ Primer. Pearson Education.
M. Morris Mano, Michael D. Ciletti (2007). Digital Design. Pearson Prentice Hall.
Mark Zwolinski (2010). Digital System Design with SystemVerilog. Pearson Prentice Hall.
John F. Wakerly (2006). Digital Design: Principles and Practices. Pearson Prentice Hall.
Bjarne Stroustrup (2013). The C++ Programming Language. Addison-Wesley.
Assessment
Assessment strategy
This module is assessed entirely by a combination of coursework exercises, presentations and reports, along with demonstrations. There is no referral opportunity for this module. There is no external repeat opportunity for this module.Summative
This is how we’ll formally assess what you have learned in this module.
Method | Percentage contribution |
---|---|
Coursework | 100% |
Repeat Information
Repeat type: Internal