About the project
Memristors mimic how the brain learns—offering low-cost, secure, and energy-efficient computing. This PhD tackles challenges limiting their adoption, from ageing to variability, to create unforgeable, self-identifying chips.
Memristor is an emerging memory device that can mimic the synaptic function of the brain and exhibit intrinsic characteristics that can be exploited to support the development of secure and resilient electronic systems. This is due to their resilience to side-channel analysis [1], stochasticity [2, 3] , and low cost [4, 5]. For example, the stochasticity of memory devices can be exploited to build securely identifiable systems. Such systems could create hardware whose identity is encoded into atomic-scale device configurations and, therefore, be practically impossible to forge.
However, several outstanding challenges currently prevent the wider adoption of Memristor technologies for security applications:
- first, reliability issues related to device ageing and device-to-device variability;
- secondly, memristors do not come with any standard CMOS support that would be required for developing any novel circuitry that exploits their characteristics;
- thirdly, as such circuits emerge, new comprehensive analysis and security metrics must be devised to benchmark their performance.
We aim to tackle these issues that will allow us to deliver a cornerstone for building unforgeable electronic devices that are resilient to side channel analysis and, overall, a step change in our digital economy.
In the first year, you will be trained to build memristor chip prototypes employing our state-of-the-art cleanroom facility. You will investigate the synaptic response of the devices and exploit this response to generate random entropy and design memristor-based identity generators into atomic-scale device configurations that will be impossible to forge.
In the second year, you will conduct a practical evaluation of reliability issues in cryogenic temperature and X-ray radiation. You will investigate the voltage variations and ageing acceleration to devise appropriate mitigation approaches.
In the third year, you will develop application demonstrator hardware-based end-to-end security solutions from the device to the network, which include the key management scheme and state-of-the-art cryptographic APIs for securely authenticating devices remotely and the detection of tampering attempts.
Von Ardenne GmbH (Germany) will be the industrial partner of this project, and you will have the opportunity to collaborate with VA engineers to build the prototype and visit their facility for knowledge exchange.
For reference:
1] J. Dofe, J. Frey, P. Nsengiyumva, and Q. Yu, "Investigating power characteristics of memristor-based logic gates and their applications in a security primitive," in 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), 2015, pp. 1-4.
[2] N. A. B. N. Hashim, F. A. B. Hamid, J. Teo, and M. S. A. Hamid, "Analysis of memristor based ring oscillators for hardware security," in 2016 IEEE International Conference on Semiconductor Electronics (ICSE), 2016, pp. 181-184.
[3] F. Corinto, O. V. Krulikovskyi, and S. D. Haliuk, "Memristor-based chaotic circuit for pseudo-random sequence generators," in 2016 18th Mediterranean Electrotechnical Conference (MELECON), 2016, pp. 1-3.
[4] H. Rady, H. Hossam, M. S. Saied, and H. Mostafa, "Memristor-Based AES Key Generation for Low Power IoT Hardware Security Modules," in 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), 2019, pp. 231-234.
5] A. Mazady, M. T. Rahman, D. Forte, and M. Anwar, "Memristor PUF—A Security Primitive: Theory and Experiment," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 5, pp. 222-229, 2015.
