About the project
CPUs with hundreds of cores are expected to take over the computing industry from embedded AI devices to servers. While hardware prediction algorithms like data prefetchers greatly improve instruction-level parallelism, they often focus on single-thread performance. This project will explore novel prediction algorithms for manycores and their theoretical limits.
Manycores provide high energy efficiency for naturally parallel problems such as AI, while remaining relatively simple. As opposed to specialised accelerators that can achieve better efficiency for more ephemeral workloads, manycores excel in critical aspects including programmability. Modern CPUs include various prediction mechanisms in hardware to increase their performance, while remaining abstracted from software. These include the cache replacement policies, data prefetchers and other predictors. The goal of such mechanisms is to minimise inefficiencies such the observed memory access latency to execute as many instructions as possible in a fixed time frame. Since multiple instructions can be executed per cycle, improving these mechanisms contributes to instruction-level parallelism (ILP).
While ILP is a thoroughly studied topic in computer architecture, most advancements are in the context of single-thread performance. While they have proven effective for CPUs with multiple cores, there are research gaps when it comes to approaching optimal performance. The increase in computing capacity has been growing faster than what the main memory technology can support. Thus, additional effort is needed to make the best of the available memory bandwidth that feeds these cores with data.
In this project, novel ILP prediction mechanisms will be developed and tailored for manycore processors. An exploration will be conducted to identify the best behaving design attributes. An analytical approach will be of particular importance in this project, in order to establish the theoretical foundations for impactful findings on future manycores. The resulting hardware algorithms will improve ILP for highly-demanding workloads of today and tomorrow.
The School of Electronics and Computer Science is committed to promoting equality, diversity inclusivity as demonstrated by our Athena SWAN award. We welcome all applicants regardless of their gender, ethnicity, disability, sexual orientation or age, and will give full consideration to applicants seeking flexible working patterns and those who have taken a career break. The University has a generous maternity policy, onsite childcare facilities, and offers a range of benefits to help ensure employees’ well-being and work-life balance. The University of Southampton is committed to sustainability and has been awarded the Platinum EcoAward.