Module overview
This module is taught by a combination of lectures, laboratory exercises and a design assignment. You will gain practical knowledge of digital system design and of digital signal processing in the context of modern systems.
The design exercise is intended to synthesise both sides of the module content, so as to broaden and deepen understanding.
Aims and Objectives
Learning Outcomes
Subject Specific Intellectual and Research Skills
Having successfully completed this module you will be able to:
- Compress the digital representation of an analogue signal and protect it from transmission errors
- Create a digital representation of an analogue signal, which is suitable for use in communication systems
- Develop CPLD and FPGA implementations of combinational and sequential digital systems
- Understand the the characteristics of stochastic signals and the ideas of sampling, quantisation and coding within the context of communications signals
- Build and debug a digital circuit
- Describe state machines of moderate complexity in SystemVerilog, simulate and synthesise into hardware
- Design testbenches to verify your design
- Develop working knowledge of state-of-the-art commercial software tools for digital system design
Knowledge and Understanding
Having successfully completed this module, you will be able to demonstrate knowledge and understanding of:
- Sequential digital system design for implementation in CPLDs and FPGAs
- The principles of Design for Test and apply them in practice
- Stochastic signals and their signal processing in communication systems, including sampling, quantisation and coding
Transferable and Generic Skills
Having successfully completed this module you will be able to:
- Present results of design work in a formal report
- Address novel design challenges by choosing appropriate analysis and design methods
Syllabus
Communications part (14 lectures):
Characterisation of Stochastic Signals
- Probability and cumulative density functions (PDF / CDF), auto- and cross-correlation, power spectral density, stochastic quantities and filtering
Sampling and Quantisation:
- Analogue-to-digital conversion
- Sampling: Nyquist criterion, frequency domain
- Aliasing
- Baseband and bandpass sampling
- Quantisation and signal-to-noise ratio
- Digital-to-analogue conversion
- Reconstruction filtering
Source and channel coding
Digits (22 lectures):
- Analysis and Design of Synchronous State Machines
- RTL synthesis of standard Combinational and Sequential Building Blocks
- Introduction to SystemVerilog assertion-based verification
- Software tools for CPLD and FPGA synthesis
- Implementation of Basic Microprocessor-Core Blocks:
Registers, ALU, SRAM, IO ports, Instruction Decoder
Synthesis of a simplified MIPS microprocessor on FPGA
- Design for Testability:
Testing combinational and sequential digital systems
Boundary Scan
Build-in self-test
Learning and Teaching
Type | Hours |
---|---|
Lecture | 32 |
Follow-up work | 18 |
Tutorial | 6 |
Wider reading or practice | 48 |
Revision | 10 |
Completion of assessment task | 18 |
Preparation for scheduled sessions | 18 |
Total study time | 150 |
Resources & Reading list
General Resources
Software requirements. Modelsim, ispLever, Synplify, Altera Quartus
Laboratory space and equipment required. CPLD and FPGA development kits
Textbooks
M M Mano, M D Ciletti, Digital Design (2007). Digital Design. Pearson Prentice Hall.
Zwolinski M (2004). Digital System Design with VHDL,. Pearson Prentice Hall.
M. Zwolinski (2010). Digital System Design with SystemVerilog. Pearson Prentice Hall.
J F Wakerly (2006). Digital Design - Principles and Practices. Pearson Prentice Hall.
I. Otung (2001). Communication Engineering Principles. Palgrave.
Assessment
Summative
This is how we’ll formally assess what you have learned in this module.
Method | Percentage contribution |
---|---|
Coursework | 15% |
Examination | 70% |
Specialist Laboratory | 15% |
Referral
This is how we’ll assess you if you don’t meet the criteria to pass this module.
Method | Percentage contribution |
---|---|
Examination | 100% |
Repeat
An internal repeat is where you take all of your modules again, including any you passed. An external repeat is where you only re-take the modules you failed.
Method | Percentage contribution |
---|---|
Examination | 100% |
Repeat Information
Repeat type: Internal & External